Panasonic MN103S User Manual page 398

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Chapter 13
Serial Interface 2
Setting Transfer Bit Count
Transfer bit count is set automatically when a frame mode is specified with the SC2FM1-0 flags of the SC2CTR2
register. When the SC2CMD flag of the SC2CTR1 register is set to "1" and UART communication is selected ,
the setting in the synchronous serial transfer bit count selection flag SC2LNG2-0 f the SC2CTR0 register
becomes invalid.
Setting First Transfer Bit
Refer to :XIII-12
Transmission Bit Count and First Transfer BIt
Refer to : XIII-13
Reception Bit Count and First Transfer BIt
In reception, when transfer bit count is 7, the data storing method to the reception data buffer SC2RB is different
depending on start transfer bit specification . When "MSB first" is selected, data is stored in lower bits of SC2RB.
When transfer bit count is 7, data "A" to "G" are stored in bp 7 to 1 of SC2RB from "A" to "G" in order as shown
in Figure: 13.3.15. When "LSB first" is selected, data is stored in upper bits of SC2RB. When transfer bit count is
7, data "A" to "G" are stored in bp 6 to 0 of SC2RB from "A" to "G" in order as shown in Figure: 13.3.16.
XIII - 26
Operation
7
A
SC2RB
Figure:13.3.15 Reception Bit Count and First Transfer BIt (MSB first)
7
SC2RB
Figure:13.3.16 Reception Bit Count and First Transfer BIt (LSB first)
6
5
4
3
B
C
D
E
6
5
4
3
G
F
E
D
2
1
0
F
G
2
1
0
C
B
A

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