Panasonic MN103S User Manual page 427

Panaxseries
Hide thumbs Also See for MN103S:
Table of Contents

Advertisement

A/D1 Conversion Data Buffer 5 (AN1BUF05: 0x0000A45C) [16-bit Access Register]
bp
15
14
Flag
-
-
At reset
0
0
Access
R
R
bp
Flag
Description
15-10
-
-
AN1BUF59
A/D1 conversion result of ADIN05 pin
9-0
to
AN1BUF50
A/D1 Conversion Data Buffer 6 (AN1BUF06: 0x0000A460) [16-bit Access Register]
bp
15
14
Flag
-
-
At reset
0
0
Access
R
R
bp
Flag
Description
15-10
-
-
AN1BUF69
A/D1 conversion result of ADIN06 pin
9-0
to
AN1BUF60
A/D1 Conversion Data Buffer 7 (AN1BUF07: 0x0000A464)[16-bit Access Register]
bp
15
14
Flag
-
-
At reset
0
0
Access
R
R
bp
Flag
Description
15-10
-
-
AN1BUF79
A/D1 conversion result of ADIN07 pin
9-0
to
AN1BUF70
13
12
11
10
AN1
-
-
-
-
BUF
0
0
0
0
R
R
R
R
13
12
11
10
AN1
-
-
-
-
BUF
0
0
0
0
R
R
R
R
13
12
11
10
AN1
-
-
-
-
BUF
0
0
0
0
R
R
R
R
9
8
7
6
AN1
AN1
AN1
AN1
BUF
BUF
BUF
BUF
59
58
57
56
×
×
×
×
R
R
R
R
Setting condition
-
A/D1 conversion result of ADIN05 pin
9
8
7
6
AN1
AN1
AN1
AN1
BUF
BUF
BUF
BUF
69
68
67
66
×
×
×
×
R
R
R
R
Setting condition
-
A/D1 conversion result of ADIN06 pin
9
8
7
6
AN1
AN1
AN1
AN1
BUF
BUF
BUF
BUF
79
78
77
76
×
×
×
×
R
R
R
R
Setting condition
-
A/D1 conversion result of ADIN07 pin
5
4
3
2
AN1
AN1
AN1
AN1
BUF
BUF
BUF
BUF
55
54
53
52
×
×
×
×
R
R
R
R
5
4
3
2
AN1
AN1
AN1
AN1
BUF
BUF
BUF
BUF
65
64
63
62
×
×
×
×
R
R
R
R
5
4
3
2
AN1
AN1
AN1
AN1
BUF
BUF
BUF
BUF
75
74
73
72
×
×
×
×
R
R
R
R
Control Registers
Chapter 14
A/D Converter
1
0
AN1
BUF
51
50
×
×
R
R
1
0
AN1
BUF
61
60
×
×
R
R
1
0
AN1
BUF
71
70
×
×
R
R
XIV - 21

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

Mn103sa7dMn103sa7g

Table of Contents