Panasonic MN103S User Manual page 268

Chapter 9
16-bit Timer
Timer 8 Compare/Capture B Mode Register (TM8MDB: 0x0000A205) [8-bit Access Register]
bp 7
Flag TM
BM1
At reset 0
Access R/W
bp Flag
TMBM1
7-6
TMBM0
5 TMBEG
4 TMBCE
3-2 -
TMB01
1-0
TMB00
IX - 32 Control registers
6 5 4 3
TM TM TM -
BM0 BEG BCE
0 0 0 0
R/W R/W R/W R
Description
Timer compare/capture B operation
mode selection
Timer B pin polarity selection
Timer capture B operation enable
-
Timer B output waveform selection
2 1 0
- TM TM
B01 B00
0 0 0
R R/W R/W
Setting condition
00: Compare register (double buffer)
01: Compare register (single buffer)
10: Capture register ( single-edge operation)
Capture at the edge selected by timer B pin polarity selection bit.
11: Capture register ( both-edge operation)
Selection by timer B pin polarity selection is ignored.
0 Capture
Count source
Pin output
1 Capture
Count source
Pin output
0: Capture operation disabled (pin input is ignored)
1: Capture operation enabled
-
00: Set when TMBC and TMCB match, reset when TMBC and
TMCA match
01: Set when TMBC and TMCB match, reset when TMBC overflows
10: Set when TMBC and TMCB match (reset only when timer is ini-
tialized)
11: Timer output (output is inverted when TMBC and TMCB match)
Rising edge (when single edge is
selected)
Rising edge (when single edge is
selected)
Positive polarity output
"L" level when reset, "H" level when
set
Falling edge (when single edge is
selected)
Falling edge (when single edge is
selected)
Negative polarity output
"H" level when reset, "L" level when
set