Panasonic MN103S User Manual page 262

Panaxseries
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Chapter 9
16-bit Timer
Timer 8 Compare/Capture A Mode Register (TM8MDA: 0x0000A204) [8-bit Access Register]
bp
7
Flag
TM
AM1
At reset
0
Access
R/W
bp
Flag
TMAM1
7-6
TMAM0
5
TMAEG
4
TMACE
3-2
-
TMA01
1-0
TMA00
IX - 26
Control registers
6
5
4
3
TM
TM
TM
-
AM0
AEG
ACE
0
0
0
0
R/W
R/W
R/W
R
Description
Timer compare/capture A operation
mode selection
Timer A pin polarity selection
Timer capture A operation enable
-
Timer A output waveform selection
2
1
0
-
TM
TM
A01
A00
0
0
0
R
R/W
R/W
Setting condition
00: Compare register (double buffer)
01: Compare register (single buffer)
10: Capture register ( single-edge operation)
Capture at the edge selected by timer A pin polarity selection bit.
11: Capture register ( both-edge operation)
Selection by timer A pin polarity selection is ignored.
0
Capture
Count control
Activation trigger
Pin output
1
Capture
Count control
Activation trigger
Pin output
0: Capture operation disabled (pin input is ignored)
1: Capture operation enabled
-
00: Set when TMBC and TMCA match, reset when TMBC and
TMCB match
01: Set when TMBC and TMCA match, reset when TMBC overflows
10: Set when TMBC and TMCA match (reset only when timer is ini-
tialized)
11: Timer output (output is inverted when TMBC and TMCA match)
Rising edge (when single edge is
selected)
Counts when "H" level is input
Falling edge
Positive polarity output
"L" level when reset, "H" level when
set
Falling edge (when single edge is
selected)
Counts when "H" level is input
Rising edge
Negative polarity output
"H" level when reset, "L" level when
set

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