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10.1.2
Block Diagram
Motor Control PWM Block Diagram
PWM period buffer
PWMSETn
PWM period
PWMSETn
16-bit counter
IOCLK
OVFIRQ
Overflow detection
UDFIRQ
Underflow detection
Compare registers
TCMPnC
TCMPnB
TCMPnA
Compare register
buffers
TCMPnC
TCMPnB
TCMPnA
Double buffer load signal
Counting start
Output timing
control buffer
PWMDCNTn
Output timing period
PWMDCNTn
16-bit counter
Interrupt & load timing control
Selector
Output timing control enable/disable
Compare
Figure:10.1.1 Motor Control PWM Block Diagram
PWM mode control
PWMMDn
Deadtimer enable/disable
Double buffer selection
Output polarity control buffer
Output switching control buffer
PWMSELn
OUTMDn
Output polarity control
Output switching control
OUTMDn
PWMSELn
2
1
0
Deadtimer insertion
8-bit counter
2
1
0
Deadtimer insertion
8-bit counter
Dead time setting buffer
DTMSETn
Motor Control PWM
PWMn0 to n2
NPWMn0 to n2
Dead time setting
DTMSETn
Overview
Chapter 10
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