Panasonic MN103S User Manual page 430

Chapter 14
A/D Converter
A/D2 Conversion Data Buffer 9 (AN2BUF09: 0x0000A49C) [16-bit Access Register]
bp 15
Flag
-
At reset 0
Access R
bp Flag
15-10 -
AN2BUF99
9-0 to
AN2BUF90
A/D2 Conversion Data Buffer 10 (AN2BUF10: 0x0000A4A0) [16-bit Access Register]
bp 15
Flag
-
At reset 0
Access R
bp Flag
15-10 -
AN2BUF109
9-0 to
AN2BUF100
A/D2 Conversion Data Buffer 11 (AN2BUF11: 0x0000A4A4) [16-bit Access Register]
bp 15
Flag
-
At reset 0
Access R
bp Flag
15-10 -
AN2BUFB119
9-0 to
AN2BUFB110
XIV - 24 Control Registers
14 13 12 11
- - - -
0 0 0 0
R R R R
Description
-
A/D2 conversion result of ADIN09 pin
14 13 12 11
- - - -
0 0 0 0
R R R R
Description
-
A/D2 conversion result of ADIN10 pin
14 13 12 11
- - - -
0 0 0 0
R R R R
Description
-
A/D2 conversion result of ADIN11 pin
10 9 8 7
AN2 AN2 AN2 AN2
- BUF BUF BUF BUF
99 98 97
× × ×
0
R R R R
Setting condition
-
A/D2 conversion result of ADIN09 pin
10 9 8 7
AN2 AN2 AN2 AN2
- BUF BUF BUF BUF
109 108 107 106
× × ×
0
R R R R
Setting condition
-
A/D2 conversion result of ADIN10 pin
10 9 8 7
AN2 AN2 AN2 AN2
- BUF BUF BUF BUF
119 118 117
0 - - -
R R R R
Setting condition
-
A/D2 conversion result of ADIN11 pin
6 5 4 3
AN2 AN2 AN2
BUF BUF BUF
96 95 94 93
× × × ×
R R R R
6 5 4 3
AN2 AN2 AN2
BUF BUF BUF
105 104 103
× × × ×
R R R R
6 5 4 3
AN2 AN2 AN2
BUF BUF BUF
116 115 114 113
- - - -
R R R R
2 1 0
AN2 AN2 AN2
BUF BUF BUF
92 91 90
× × ×
R R R
2 1 0
AN2 AN2 AN2
BUF BUF BUF
102 101 100
× × ×
R R R
2 1 0
AN2 AN2 AN2
BUF BUF BUF
112 111 110
- - -
R R R