Panasonic MN103S User Manual page 547

MN103SA7D/A7G LSI User's Manual Record of Changes from the 1st Edition dated in March, 2005 to the 1st
Edition 1st Printing dated in April, 2006.
Page Section Definition
1-8 Line 29 Change
8-18 Table Change
Set con-
dition
8-24 Table Change
Set con-
dition
8-26 Table Change
Set con-
dition
8-27 Table Change
Set con-
dition
8-28 Table Change
Set con-
dition
8-37 Table Change
Descrip-
tion (3)
9-20 Upper Change
table
9-21 Upper Change
table
9-22 Upper Change
table
9-23 Upper Change
table
9-24 Upper Change
table
Previous Edition (Ver.1)
External interrupt
TM0BR value is loaded into TM0BC.
Timer output 0 is set to "L" level.
TM6BR value is loaded into TM6BC.
Timer output 6 is set to "L" level.
TM14BR value is loaded into TM14BC.
Timer output 14is set to "L" level.
TM15BR value is loaded into TM15BC.
Timer output 15 is set to "L" level.
TM16BR value is loaded into TM16BC.
Timer output 16 is set to "L" level.
⋅⋅⋅ The setting value is 149 due to
200KHz. ⋅⋅⋅
15 14 13
TMXF - TMTGE TMONE TMCLE
0 0 0
R/W R R/W
R/W
15 14 13
TMXF - TMTGE TMONE TMCLE
0 0 0
R/W R R/W R/W
15 14 13
TMXF - TMTGE TMONE TMCLE
0 0 0
R/W R R/W R/W
15 14 13
TMXF - TMTGE TMONE TMCLE
0 0 0
R/W R R/W R/W
15 14 13
TMXF - TMTGE TMONE TMCLE
0 0 0
R/W R R/W R/W
8 pins External interrupt
TM0BR value is loaded into TM0BC.
TM6BR value is loaded into TM6BC.
TM14BR value is loaded into TM14BC.
TM15BR value is loaded into TM15BC.
TM16BR value is loaded into TM16BC.
⋅⋅⋅ The setting value is 149 (0x95) due to
200KHz. ⋅⋅⋅
12 11 15
TMXF
0 0 0
R
R/W
12 11 15
TMXF -
0 0 0
R/W R
12 11 15
TMXF -
0 0 0
R/W R
12 11 15
TMXF -
0 0 0
R/W R
12 11 15
TMXF -
0 0 0
R/W R
New Edition (Ver.1.1)
9 pins
14 13 12
- TMTGE TMONE TMCLE
0 0 0
R R/W R/W R/W
14 13 12
TMTGE TMONE TMCLE
0 0 0
R R/W R/W R/W
14 13 12
TMTGE TMONE TMCLE
0 0 0
R R/W R/W R/W
14 13 12
TMTGE TMONE TMCLE
0 0 0
R R/W R/W R/W
14 13 12 11
TMTGE TMONE TMCLE
0 0 0
R R/W R/W R/W
Record of Changes - 10
11
1
11
1
11
1
11
1
1