Panasonic MN103S User Manual page 381

Serial Interface 2 Mode Register 3 (SC2CTR3: 0x0000A125) [8-bit Access Register]
bp 7 6
Flag SC2 SC2
FDC1 FDC0
At reset 0 0
Access R/W R/W
bp Flag Description
Output selection after SB0 last
SC2FDC 1 data transmission
7-6
SC2FDC 0
5-4 - -
Prescaler count control
3 SC2PSCE
Clock selection
SC2PSC2
2-0 SC2PSC1
SC2PSC0
5 4 3 2
SC2 SC2
- -
PSCE PSC2
0 0 0 0
R R R/W R/W
Setting condition
00: Fixed at "1"(High) output
10: Fixed at "0"(Low) output
X1: Last data retained
-
0: Count disabled
1: Count enabled
000: 1/2 of timer underflow
001: 1/4 of timer underflow
010: 1/16 of timer underflow
011: 1/64 of timer underflow
100: IOCLK/2
101: IOCLK/4
110: Setting prohibited
111: Setting prohibited
Timer is selected by the serial interface clock selection register (SIFCLK).
1 0
SC2 SC2
PSC1 PSC0
0 0
R/W R/W
Clock synchronous
Serial Interface 2
UART
000: 1/32 of timer underflow
001: 1/64 of timer underflow
010: 1/256 of timer underflow
011: 1/1024 of timer underflow
100: IOCLK/32
101: IOCLK/64
110: Setting prohibited
111: Setting prohibited
Control Registers
Chapter 13
XIII - 9