Control Registers - Panasonic MN103S User Manual

Chapter 2
CPU Basics
2.3.2

Control Registers

The microcontroller core uses the memory-mapped I/O method to allocate a variety of control registers in a con-
trol register address space between x'00008000 and x'00009FFF.
The registers listed below are described in this section. For details on other control registers, refer to the respec-
tive sections that explain the various built-in peripheral functions.
Table:2.3.2 Control Register
CPU mode
CPU Mode Register (CPUM: 0x00008040) [8, 16-bit Access Register]
This register is prohibited to access.
bp 15
Flag -
At reset 0
Access R
bp Flag
15-0 -
Never change the CPU mode register.
.. ..
II - 8 Programming Model
Registers Address
CPUM 0x00008040
14 13 12 11
- - - -
0 0 0 0
R R R R
Description
Setting prohibited
System reserve
R/W Access size
R/W 8, 16
10 9 8 7
- - - -
0 0 0 0
R R R R
Function
CPU mode register
6 5 4 3
- OSCID STSEL HASEL SLSEL
0 0 0 0
R R R/W R/W R/W
Set condition
Pages
II-8
2 1 0
OSC1 OSC0
0 0 0
R/W R/W