Xilinx ZCU106 User Manual page 92

Quad 224:
• MGTREFCLK0 - PCIE_CLK_P/N
• MGTREFCLK1 - USER_SMA_MGT_CLOCK_C_P/N
• Contains four GTH transceivers allocated to PCIE_TX/RX[0:3]_P/N
Quad 225:
• MGTREFCLK0 - FMC_HPC1_GBTCLK0_M2C_C_P/N
• MGTREFCLK1 - SFP_SI5328_OUT_C_P/N
• Contains one GTH transceiver allocated to SDI_MGT_TX/RX_P/N
• Contains one GTH transceiver allocated to SMA_MGT TX/RX_P/N
• Contains two GTH transceivers allocated to SFP[0:1]_TX/RX_P/N
Quad 226:
• MGTREFCLK0 - FMC_HPC0_GBTCLK0_M2C_C_P/N
• MGTREFCLK1 - USER_MGT_SI570_CLOCK1_C_P/N
• Contains four GTH transceivers allocated to FMC_HPC0_DP[0:3]_C2M/M2C_P/N
Quad 227:
• MGTREFCLK0 - FMC_HPC0_GBTCLK1_M2C_C_P/N
• MGTREFCLK1 - USER_MGT_SI570_CLOCK2_C_P/N
• Contains four GTH transceivers allocated to FMC_HPC0_DP[4:7]_C2M/M2C_P/N
ZCU106 Board User Guide
UG1244 (v1.0) March 28, 2018
Chapter 3: Board Component Descriptions
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