Xilinx ZCU106 User Manual page 131

#Other net PACKAGE_PIN AL26 - DR4_SODIMM_DQ28
#Other net PACKAGE_PIN AL27 - DR4_SODIMM_DQ29
#Other net PACKAGE_PIN AH29 - DR4_SODIMM_DQ30
#Other net PACKAGE_PIN AL28 - DR4_SODIMM_DQ31
#Other net PACKAGE_PIN AB29 - DR4_SODIMM_DQ32
#Other net PACKAGE_PIN AB30 - DR4_SODIMM_DQ33
#Other net PACKAGE_PIN AC29 - DR4_SODIMM_DQ34
#Other net PACKAGE_PIN AD32 - DR4_SODIMM_DQ35
#Other net PACKAGE_PIN AC31 - DR4_SODIMM_DQ36
#Other net PACKAGE_PIN AE30 - DR4_SODIMM_DQ37
#Other net PACKAGE_PIN AC28 - DR4_SODIMM_DQ38
#Other net PACKAGE_PIN AE29 - DR4_SODIMM_DQ39
#Other net PACKAGE_PIN AC27 - DR4_SODIMM_DQ40
#Other net PACKAGE_PIN AA27 - DR4_SODIMM_DQ41
#Other net PACKAGE_PIN AA28 - DR4_SODIMM_DQ42
#Other net PACKAGE_PIN AB28 - DR4_SODIMM_DQ43
#Other net PACKAGE_PIN W27
#Other net PACKAGE_PIN W29
#Other net PACKAGE_PIN W28
#Other net PACKAGE_PIN V27
#Other net PACKAGE_PIN AA32 - DR4_SODIMM_DQ48
#Other net PACKAGE_PIN AA33 - DR4_SODIMM_DQ49
#Other net PACKAGE_PIN AA34 - DR4_SODIMM_DQ50
#Other net PACKAGE_PIN AE34 - DR4_SODIMM_DQ51
#Other net PACKAGE_PIN AD34 - DR4_SODIMM_DQ52
#Other net PACKAGE_PIN AB31 - DR4_SODIMM_DQ53
#Other net PACKAGE_PIN AC34 - DR4_SODIMM_DQ54
#Other net PACKAGE_PIN AC33 - DR4_SODIMM_DQ55
#Other net PACKAGE_PIN AA30 - DR4_SODIMM_DQ56
#Other net PACKAGE_PIN Y30
#Other net PACKAGE_PIN AA31 - DR4_SODIMM_DQ58
#Other net PACKAGE_PIN W30
#Other net PACKAGE_PIN Y33
#Other net PACKAGE_PIN W33
#Other net PACKAGE_PIN W34
#Other net PACKAGE_PIN Y34
#Other net PACKAGE_PIN AF32 - DR4_SODIMM_CB0
#Other net PACKAGE_PIN AE32 - DR4_SODIMM_CB1
#Other net PACKAGE_PIN AH33 - DR4_SODIMM_CB2
#Other net PACKAGE_PIN AE33 - DR4_SODIMM_CB3
#Other net PACKAGE_PIN AF33 - DR4_SODIMM_CB4
#Other net PACKAGE_PIN AH34 - DR4_SODIMM_CB5
#Other net PACKAGE_PIN AJ34 - DR4_SODIMM_CB6
#Other net PACKAGE_PIN AK34 - DR4_SODIMM_CB7
#Other net PACKAGE_PIN AN27 - DR4_SODIMM_DQS0_C
#Other net PACKAGE_PIN AN26 - DR4_SODIMM_DQS0_T
#Other net PACKAGE_PIN AP30 - DR4_SODIMM_DQS1_C
#Other net PACKAGE_PIN AN29 - DR4_SODIMM_DQS1_T
#Other net PACKAGE_PIN AJ26 - DR4_SODIMM_DQS2_C
#Other net PACKAGE_PIN AH26 - DR4_SODIMM_DQS2_T
#Other net PACKAGE_PIN AK29 - DR4_SODIMM_DQS3_C
#Other net PACKAGE_PIN AK28 - DR4_SODIMM_DQS3_T
#Other net PACKAGE_PIN AD31 - DR4_SODIMM_DQS4_C
#Other net PACKAGE_PIN AD30 - DR4_SODIMM_DQS4_T
#Other net PACKAGE_PIN Y28
#Other net PACKAGE_PIN Y27
#Other net PACKAGE_PIN AB34 - DR4_SODIMM_DQS6_C
#Other net PACKAGE_PIN AB33 - DR4_SODIMM_DQS6_T
#Other net PACKAGE_PIN W32
ZCU106 Board User Guide
UG1244 (v1.0) March 28, 2018
Bank 504 - PS_DDR_DQ28
Bank 504 - PS_DDR_DQ29
Bank 504 - PS_DDR_DQ30
Bank 504 - PS_DDR_DQ31
Bank 504 - PS_DDR_DQ32
Bank 504 - PS_DDR_DQ33
Bank 504 - PS_DDR_DQ34
Bank 504 - PS_DDR_DQ35
Bank 504 - PS_DDR_DQ36
Bank 504 - PS_DDR_DQ37
Bank 504 - PS_DDR_DQ38
Bank 504 - PS_DDR_DQ39
Bank 504 - PS_DDR_DQ40
Bank 504 - PS_DDR_DQ41
Bank 504 - PS_DDR_DQ42
Bank 504 - PS_DDR_DQ43
- DR4_SODIMM_DQ44 Bank 504 - PS_DDR_DQ44
- DR4_SODIMM_DQ45 Bank 504 - PS_DDR_DQ45
- DR4_SODIMM_DQ46 Bank 504 - PS_DDR_DQ46
- DR4_SODIMM_DQ47 Bank 504 - PS_DDR_DQ47
Bank 504 - PS_DDR_DQ48
Bank 504 - PS_DDR_DQ49
Bank 504 - PS_DDR_DQ50
Bank 504 - PS_DDR_DQ51
Bank 504 - PS_DDR_DQ52
Bank 504 - PS_DDR_DQ53
Bank 504 - PS_DDR_DQ54
Bank 504 - PS_DDR_DQ55
Bank 504 - PS_DDR_DQ56
- DR4_SODIMM_DQ57 Bank 504 - PS_DDR_DQ57
Bank 504 - PS_DDR_DQ58
- DR4_SODIMM_DQ59 Bank 504 - PS_DDR_DQ59
- DR4_SODIMM_DQ60 Bank 504 - PS_DDR_DQ60
- DR4_SODIMM_DQ61 Bank 504 - PS_DDR_DQ61
- DR4_SODIMM_DQ62 Bank 504 - PS_DDR_DQ62
- DR4_SODIMM_DQ63 Bank 504 - PS_DDR_DQ63
Bank 504 - PS_DDR_DQ64
Bank 504 - PS_DDR_DQ65
Bank 504 - PS_DDR_DQ66
Bank 504 - PS_DDR_DQ67
Bank 504 - PS_DDR_DQ68
Bank 504 - PS_DDR_DQ69
Bank 504 - PS_DDR_DQ70
Bank 504 - PS_DDR_DQ71
Bank 504 - PS_DDR_DQS_N0
Bank 504 - PS_DDR_DQS_P0
Bank 504 - PS_DDR_DQS_N1
Bank 504 - PS_DDR_DQS_P1
Bank 504 - PS_DDR_DQS_N2
Bank 504 - PS_DDR_DQS_P2
Bank 504 - PS_DDR_DQS_N3
Bank 504 - PS_DDR_DQS_P3
Bank 504 - PS_DDR_DQS_N4
Bank 504 - PS_DDR_DQS_P4
- DR4_SODIMM_DQS5_C Bank 504 - PS_DDR_DQS_N5
- DR4_SODIMM_DQS5_T Bank 504 - PS_DDR_DQS_P5
Bank 504 - PS_DDR_DQS_N6
Bank 504 - PS_DDR_DQS_P6
- DR4_SODIMM_DQS7_C Bank 504 - PS_DDR_DQS_N7
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Appendix B: Master Constraints File Listing
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