Xilinx ZCU106 User Manual page 78

The SDI video circuit connections to the XCZU7EV MPSoC U1 are listed in
Table 3-30: SDI Video Connections to MPSoC U1
XCZU7EV
(U1) Pin
H23
B21
L21
C14 SDI_XALARM_TX
A9
AC5 SDI_MGT_TX_N
AC6
J19
J20
E13 SDI_XALARM_RX
AC1 SDI_MGT_RX_N
AC2 SDI_MGT_RX_P
Notes:
1. Series capacitor coupled.
2. MGT connections I/O standard not applicable.
3. Level-shifted V
ADJ_FMC
4. Level-shifted V
ADJ_FMC
ZCU106 Board User Guide
UG1244 (v1.0) March 28, 2018
Schematic Net
I/O Standard
Name
(4)
SDI_MISO LVCMOS18
(3)
SDI_SCLK LVCMOS18
(3)
SDI_MOSI LVCMOS18
(4)
LVCMOS18
(3)
SDI_CS_RCLKR LVCMOS18
(2)
(2)
SDI_MGT_TX_P
(3)
SDI_CS_DRVR LVCMOS18
(3)
SDI_CS_RCVR LVCMOS18
(4)
LVCMOS18
(2)
(2)
to PS_DDR4_VPP_2V5 (1.8V-to-2.5V) at U146 SN74AVC8T245.
to PS_DDR4_VPP_2V5 (1.8V-to-2.5V) at U145 SN74AVC4T245.
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Chapter 3: Board Component Descriptions
Connected Component
Pin
19
8
24
21
14
28
22
6
29
8
13
(1)
4
(1)
3
4
18
9
(1)
19 SDO0_N
(1)
20 SDO0_P
Table 3-30.
Name Device
MF1 U139 M23145G
MF2 U138 M23428G
MF1 U144 M23544G
MF2 U139 M23145G
MF3 U138 M23428G
MF2 U144 M23544G
MF3 U139 M23145G
MF1 U138 M23428G
MF3 U144 M23544G
MF4
XCS
U139 M23145G
SDI_N
SDI_P
MF0 U138 M23428G
XCS_N
MF4
U144 M23544G
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