Xilinx ZCU106 User Manual page 49

Table 3-13: Clock Connections, Source to XCZU7EV MPSoC (Cont'd)
Clock Source Ref.
Des. and Pin
U56.4
U56.5
U51.11 USER_MGT_SI570_CLOCK1_P
U51.12 USER_MGT_SI570_CLOCK1_N
U51.13 USER_MGT_SI570_CLOCK2_P
U51.14 USER_MGT_SI570_CLOCK2_N
J79.1
J80.1 USER_SMA_MGT_CLOCK_N
U108.28
U108.29
U20.28
U20.29
Notes:
1. U1 XCU7EV Bank 503 supports LVCMOS level inputs.
2. U1 MGT (I/O standards do not apply).
ZCU106 Board User Guide
UG1244 (v1.0) March 28, 2018
Net Name
USER_MGT_SI570_P
USER_MGT_SI570_N
USER_SMA_MGT_CLOCK_P
HDMI_SI5324_OUT_P
HDMI_SI5324_OUT_N
SFP_SI5328_OUT_P
SFP_SI5328_OUT_N
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Chapter 3: Board Component Descriptions
I/O Standard
(2)
(1-to-2 CLOCK BUFFER) U51.6
(2)
(1-to-2 CLOCK BUFFER) U51.7
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
XCZU7EV (U1) Pin
U10
U9
R10
R9
AA10
AA9
AD8
AD7
W10
W9
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