Vadj_Fmc Power Rail; Ti Msp430 System Controller - Xilinx ZCU106 User Manual

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VADJ_FMC Power Rail

The ZCU106 evaluation board implements the ANSI/VITA 57.1 section 5.5.1 IPMI support
functionality. The power control of the V
controller. This rail powers both the FMC HPC0 (J5) and the FMC HPC1 (J4) V
as the XCZU7EV HP banks 28, 67, and 68. The valid values of the V
and 1.8V.
At power on, the system controller detects if an FMC module is connected to each interface:
If no cards are attached to the FMC ports, the V
When one FMC card is attached, its IIC EEPROM is read to find a V
supported by both the ZCU106 board and the FMC module, within the available
choices of 1.8V, 1.5V, 1.2V, and 0.0V.
When two FMC cards are attached with differing V
the lowest value compatible with the ZCU106 board and the FMC modules, within the
available choices of 1.8V, 1.5V, 1.2V, and 0.0V.
If no valid information is found in an FMC card IIC EEPROM, the V
0.0V.
The system controller user interface allows the FMC IPMI routine to be overridden and an
explicit value can be set for the V
cards that do not contain valid IPMI EPROM data defined by the ANSI/VITA57.1
specification.

TI MSP430 System Controller

[Figure
2-1, callout 19]
The ZCU106 board includes an on-board MSP430 with integrated power advantage
demonstration and system controller firmware. A host PC resident system controller user
interface (SCUI) is provided on the ZCU106 web page. This GUI enables you to query and
control select programmable features such as clocks, FMC functionality, and power system
parameters. The ZCU106 web page also includes a tutorial on the SCUI (XTP433)
and board setup instructions (XTP435)
ZCU106 Board User Guide
UG1244 (v1.0) March 28, 2018
Chapter 3: Board Component Descriptions
power rail is managed by the U41 system
ADJ_FMC
voltage is set to 1.8V.
ADJ
ADJ
rail. Override mode is useful for FMC mezzanine
ADJ_FMC
[Ref
13].
www.xilinx.com
pins, as well
ADJ
rail are 1.2V, 1.5V,
ADJ_FMC
voltage
ADJ
requirements, V
ADJ_FMC
rail is set to
ADJ_FMC
Send Feedback
is set to
[Ref 12]
116

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