Xilinx ZCU106 User Manual page 74

X-Ref Target - Figure 3-25
Table 3-29: HDMI Connections to FPGA U1
XCZU7EV
Schematic Net Name
(U1) Pin
AN6 HDMI_TX0_P
AN5 HDMI_TX0_N
AM4 HDMI_TX1_P
AM3 HDMI_TX1_N
AL6 HDMI_TX2_P
AL5 HDMI_TX2_N
G21 HDMI_TX_LVDS_OUT_P
F21 HDMI_TX_LVDS_OUT_N
N8 HDMI_TX_SRC_SCL
N9 HDMI_TX_SRC_SDA
N11 HDMI_TX_EN
M12 HDMI_TX_CEC
N13 HDMI_TX_HPD
ZCU106 Board User Guide
UG1244 (v1.0) March 28, 2018
Figure 3-25: HDMI RX Interface Circuit
I/O Standard
(1)
(1)
(1)
(1)
(1)
(1)
LVDS
LVDS
LVCMOS33
LVCMOS33
LVCMOS33
LVCMOS33
LVCMOS33
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Chapter 3: Board Component Descriptions
Connected Component
Pin Name
8 IN_D0P
9 IN_D0N
5 IN_D1P
6 IN_D1N
2 IN_D2P
3 IN_D2N
11 IN_CLKP
12 IN_CLKN
46 SCL_SRC
47 SDA_SRC
42 OE
24 CEC_A
3 HPD_A
Send Feedback
X19189-022218
Device
SN65DP159
(U94)
TPD12S016RK
(U70)
74