Xilinx ZCU106 User Manual page 125

Table 3-54: Power System Devices (Cont'd)
Device Ref. PMBus
Type Des. Addr.
MAX15027 U39
NA
MAX15303 U13
0x10
MAX8869E U31
NA
MAX8869E U30
NA
MAX8869E U143
NA
MAX8869E U37
NA
U49
0x1A
MAX15301
U8
0x1B
MAX15303
TPS15200 U36
NA
TPS15200 U35
NA
The FMC HPC0 (J5) and FMC HPC1 (J4) VADJ pins are wired to the programmable rail
VADJ_FMC_BUS. The VADJ_FMC_BUS rail is programmed to 1.80V by default. The valid
values of the VADJ_FMC rail are 1.2V, 1.5V, and 1.8V. The VADJ_FMC derivative rail powers
the XCZU7EV HP banks 28, 67, and 68 (see
PMBus programming for the Maxim InTune power controllers is available at the Maxim
website [Ref 22]. The PCB layout and power system design meets the recommended criteria
described in the UltraScale Architecture PCB Design User Guide (UG583)
ZCU106 Board User Guide
UG1244 (v1.0) March 28, 2018
Power Rail Net
Description
Maxim LDO
PS_DDR4_VPP_2V5
regulator 1A
Maxim InTune digital
POL controller 4A
Maxim LDO
regulator 300MA
Maxim LDO
regulator 100MA
Maxim LDO
regulator 1A
Maxim LDO
regulator 1A
Maxim InTune digital
POL controller 20A
Maxim InTune digital
POL controller 6A
Memory Vtt
sink-source
regulator 3A
Memory Vtt
sink-source
regulator 3A
www.xilinx.com
Chapter 3: Board Component Descriptions
Power Rail
Name Voltage
2.50V
VCCOPS 1.80V
VCCOPS3 1.81V
VCCPSDDRPLL 1.81V
UTIL_1V13 1.13V
UTIL_1V8 1.80V
UTIL_3V3 3.30V
UTIL_5V0 5.00V
PS_DDR4_VTT 0.6V
PL_DDR4_VTT 0.6V
Table 3-2, page 28). Documentation describing
INA226 Schem.
Address Page
NA 85
PS:0x47 86
PS:0x4A 87
PS:0x4B 88
NA 89
NA 90
NA 91
NA 92
NA 93
NA 93
[Ref 3].
125
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