Xilinx ZCU106 User Manual page 105

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The ZCU106 board FMC VADJ voltage VADJ_FMC_BUS for the J5 (HPC0) and J4 (HPC1) FMC
connectors is determined by the MAX15301 U63 voltage regulator described in
Power System, page
HPC0 J5 connections to XCZU7EV U1 are shown in
Table 3-43: J5 HPC0 FMC Section A and B Connections to XCZU7EV U1
J5 Pin
Schematic Net Name
A2
FMC_HPC0_DP1_M2C_P
A3
FMC_HPC0_DP1_M2C_N
A6
FMC_HPC0_DP2_M2C_P
A7
FMC_HPC0_DP2_M2C_N
A10
FMC_HPC0_DP3_M2C_P
A11
FMC_HPC0_DP3_M2C_N
A14
FMC_HPC0_DP4_M2C_P
A15
FMC_HPC0_DP4_M2C_N
A18
FMC_HPC0_DP5_M2C_P
A19
FMC_HPC0_DP5_M2C_N
A22
FMC_HPC0_DP1_C2M_P
A23
FMC_HPC0_DP1_C2M_N
A26
FMC_HPC0_DP2_C2M_P
A27
FMC_HPC0_DP2_C2M_N
A30
FMC_HPC0_DP3_C2M_P
A31
FMC_HPC0_DP3_C2M_N
A34
FMC_HPC0_DP4_C2M_P
A35
FMC_HPC0_DP4_C2M_N
A38
FMC_HPC0_DP5_C2M_P
A39
FMC_HPC0_DP5_C2M_N
Notes:
1. Series capacitor coupled to FPGA U1 pin.
2. Connected to I2C switch U135 pins 4 and 5.
3. FPGA U1 JTAG TCK, TMS, TDO pins are buffered by U48 SN74AVC8T245.
4. J5 HPC0 TDO-TDI connections to U27 HPC0 FMC JTAG bypass switch (N.C. normally-closed/bypassing J5 until an FMC card
is plugged onto J5).
5. FMC_HPC0_PRSNT_M2C_B is the HPC FMC JTAG bypass switch U27.4 OE control signal, driven by I2C I/O expander U97.13.
6. Sourced from VADJ_FMC_BUS voltage regulator U63 MAX15301 pin 32 power good output signal.
7. U1 MGT (I/O standards do not apply).
ZCU106 Board User Guide
UG1244 (v1.0) March 28, 2018
122. The valid values of the VADJ_FMC rail are 1.2V, 1.5V, and 1.8V. The
I/O
U1
J5 Pin
Standard
Pin
(7)
U2
B1
(7)
U1
B4
(7)
P4
B5
(7)
P3
B8
(7)
V4
B9
(7)
V3
B12
(7)
G2
B13
(7)
G1
B16
(7)
L2
B17
(7)
L1
B20
(7)
T4
B21
(7)
T3
B24
(7)
N6
B25
(7)
N5
B28
(7)
U6
B29
(7)
U5
B32
(7)
H4
B33
(7)
H3
B36
(7)
L6
B37
(7)
L5
B40
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Chapter 3: Board Component Descriptions
Table 3-43
through
Schematic Net Name
NC
NC
NC
NC
NC
FMC_HPC0_DP7_M2C_P
FMC_HPC0_DP7_M2C_N
FMC_HPC0_DP6_M2C_P
FMC_HPC0_DP6_M2C_N
FMC_HPC0_GBTCLK1_M2C_P
FMC_HPC0_GBTCLK1_M2C_N
NC
NC
NC
NC
FMC_HPC0_DP7_C2M_P
FMC_HPC0_DP7_C2M_N
FMC_HPC0_DP6_C2M_P
FMC_HPC0_DP6_C2M_N
NC
Send Feedback
Board
Table
3-46.
I/O
U1
Standard
Pin
(7)
J2
(7)
J1
(7)
N2
(7)
N1
(1)(7)
T8
(1)(7)
T7
(7)
K4
(7)
K3
(7)
M4
(7)
M3
105

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