Xilinx ZCU106 User Manual page 52

Programmable User MGT Clock
[Figure 2-1, callout 10]
The ZCU106 board has a programmable low-jitter 3.3V LVDS SI570 differential oscillator
(U56) connected to a 1-to-2 SI53340 clock driver (U51). On power up, the user clock
defaults to an output frequency of 156.250 MHz. User applications can change the output
frequency within the range of 10 MHz to 810 MHz through an I2C interface. Power cycling
the ZCU106 board reverts this user clock to the default frequency of 156.250 MHz.
This oscillator can be reprogrammed from MSP430 system controller U41 (see
System Controller, page 116
• Programmable oscillator: Silicon Labs Si570BAB000544DG (10 MHz-810 MHz,
156.250 MHz default)
• LVDS differential output
• Total stability: 61.5 ppm
The user clock MGT circuit is shown in
sheets are available on the Silicon Labs website
X-Ref Target - Figure 3-10
ZCU106 Board User Guide
UG1244 (v1.0) March 28, 2018
for more information).
Figure
Figure 3-10: Programmable User MGT Clock
www.xilinx.com
Chapter 3: Board Component Descriptions
3-10. The Silicon Labs Si570 and Si53340 data
[Ref 19].
TI MSP430
X16379-050117
52
Send Feedback