Xilinx ZCU106 User Manual page 130

#Other net PACKAGE_PIN AF30 - DR4_SODIMM_A13
#Other net PACKAGE_PIN AG29 - DR4_SODIMM_WE_B
#Other net PACKAGE_PIN AG28 - DR4_SODIMM_CAS_B
#Other net PACKAGE_PIN AF28 - DR4_SODIMM_RAS_B
#Other net PACKAGE_PIN AE27 - DR4_SODIMM_BA0
#Other net PACKAGE_PIN AE28 - DR4_SODIMM_BA1
#Other net PACKAGE_PIN AD27 - DR4_SODIMM_BG0
#Other net PACKAGE_PIN AF27 - DR4_SODIMM_BG1
#Other net PACKAGE_PIN AN24 - DR4_SODIMM_DM0_B
#Other net PACKAGE_PIN AM29 - DR4_SODIMM_DM1_B
#Other net PACKAGE_PIN AH24 - DR4_SODIMM_DM2_B
#Other net PACKAGE_PIN AJ29 - DR4_SODIMM_DM3_B
#Other net PACKAGE_PIN AD29 - DR4_SODIMM_DM4_B
#Other net PACKAGE_PIN Y29
#Other net PACKAGE_PIN AC32 - DR4_SODIMM_DM6_B
#Other net PACKAGE_PIN Y32
#Other net PACKAGE_PIN AF34 - DR4_SODIMM_DM8_B
#Other net PACKAGE_PIN AN33 - DR4_SODIMM_CKE0
#Other net PACKAGE_PIN AL31 - DR4_SODIMM_CK0_T
#Other net PACKAGE_PIN AN32 - DR4_SODIMM_CK0_C
#Other net PACKAGE_PIN AH32 - DR4_SODIMM_CKE1
#Other net PACKAGE_PIN AL30 - DR4_SODIMM_CK1_T
#Other net PACKAGE_PIN AL32 - DR4_SODIMM_CK1_C
#Other net PACKAGE_PIN AA26 - DR4_SODIMM_PARITY
#Other net PACKAGE_PIN AE25 - DR4_SODIMM_ACT_B
#Other net PACKAGE_PIN AB26 - DR4_SODIMM_ALERT_B Bank 504 - PS_DDR_ALERT_N
#Other net PACKAGE_PIN AP32 - DR4_SODIMM_ODT0
#Other net PACKAGE_PIN AJ32 - DR4_SODIMM_ODT1
#Other net PACKAGE_PIN AP33 - DR4_SODIMM_CS0_B
#Other net PACKAGE_PIN AK32 - DR4_SODIMM_CS1_B
#Other net PACKAGE_PIN AD26 - DDR4_SODIMM_RESET_B Bank 504 - PS_DDR_RAM_RST_N
#Other net PACKAGE_PIN AP27 - DR4_SODIMM_DQ0
#Other net PACKAGE_PIN AP25 - DR4_SODIMM_DQ1
#Other net PACKAGE_PIN AP26 - DR4_SODIMM_DQ2
#Other net PACKAGE_PIN AM26 - DR4_SODIMM_DQ3
#Other net PACKAGE_PIN AP24 - DR4_SODIMM_DQ4
#Other net PACKAGE_PIN AL25 - DR4_SODIMM_DQ5
#Other net PACKAGE_PIN AM25 - DR4_SODIMM_DQ6
#Other net PACKAGE_PIN AM24 - DR4_SODIMM_DQ7
#Other net PACKAGE_PIN AM28 - DR4_SODIMM_DQ8
#Other net PACKAGE_PIN AN28 - DR4_SODIMM_DQ9
#Other net PACKAGE_PIN AP29 - DR4_SODIMM_DQ10
#Other net PACKAGE_PIN AP28 - DR4_SODIMM_DQ11
#Other net PACKAGE_PIN AM31 - DR4_SODIMM_DQ12
#Other net PACKAGE_PIN AP31 - DR4_SODIMM_DQ13
#Other net PACKAGE_PIN AN31 - DR4_SODIMM_DQ14
#Other net PACKAGE_PIN AM30 - DR4_SODIMM_DQ15
#Other net PACKAGE_PIN AF25 - DR4_SODIMM_DQ16
#Other net PACKAGE_PIN AG25 - DR4_SODIMM_DQ17
#Other net PACKAGE_PIN AG26 - DR4_SODIMM_DQ18
#Other net PACKAGE_PIN AJ25 - DR4_SODIMM_DQ19
#Other net PACKAGE_PIN AG24 - DR4_SODIMM_DQ20
#Other net PACKAGE_PIN AK25 - DR4_SODIMM_DQ21
#Other net PACKAGE_PIN AJ24 - DR4_SODIMM_DQ22
#Other net PACKAGE_PIN AK24 - DR4_SODIMM_DQ23
#Other net PACKAGE_PIN AH28 - DR4_SODIMM_DQ24
#Other net PACKAGE_PIN AH27 - DR4_SODIMM_DQ25
#Other net PACKAGE_PIN AJ27 - DR4_SODIMM_DQ26
#Other net PACKAGE_PIN AK27 - DR4_SODIMM_DQ27
ZCU106 Board User Guide
UG1244 (v1.0) March 28, 2018
Bank 504 - PS_DDR_A13
Bank 504 - PS_DDR_A14
Bank 504 - PS_DDR_A15
Bank 504 - PS_DDR_A16
Bank 504 - PS_DDR_BA0
Bank 504 - PS_DDR_BA1
Bank 504 - PS_DDR_BG0
Bank 504 - PS_DDR_BG1
Bank 504 - PS_DDR_DM0
Bank 504 - PS_DDR_DM1
Bank 504 - PS_DDR_DM2
Bank 504 - PS_DDR_DM3
Bank 504 - PS_DDR_DM4
- DR4_SODIMM_DM5_B Bank 504 - PS_DDR_DM5
Bank 504 - PS_DDR_DM6
- DR4_SODIMM_DM7_B Bank 504 - PS_DDR_DM7
Bank 504 - PS_DDR_DM8
Bank 504 - PS_DDR_CKE0
Bank 504 - PS_DDR_CK0
Bank 504 - PS_DDR_CK_N0
Bank 504 - PS_DDR_CKE1
Bank 504 - PS_DDR_CK1
Bank 504 - PS_DDR_CK_N1
Bank 504 - PS_DDR_PARITY
Bank 504 - PS_DDR_ACT_N
Bank 504 - PS_DDR_ODT0
Bank 504 - PS_DDR_ODT1
Bank 504 - PS_DDR_CS_N0
Bank 504 - PS_DDR_CS_N1
Bank 504 - PS_DDR_DQ0
Bank 504 - PS_DDR_DQ1
Bank 504 - PS_DDR_DQ2
Bank 504 - PS_DDR_DQ3
Bank 504 - PS_DDR_DQ4
Bank 504 - PS_DDR_DQ5
Bank 504 - PS_DDR_DQ6
Bank 504 - PS_DDR_DQ7
Bank 504 - PS_DDR_DQ8
Bank 504 - PS_DDR_DQ9
Bank 504 - PS_DDR_DQ10
Bank 504 - PS_DDR_DQ11
Bank 504 - PS_DDR_DQ12
Bank 504 - PS_DDR_DQ13
Bank 504 - PS_DDR_DQ14
Bank 504 - PS_DDR_DQ15
Bank 504 - PS_DDR_DQ16
Bank 504 - PS_DDR_DQ17
Bank 504 - PS_DDR_DQ18
Bank 504 - PS_DDR_DQ19
Bank 504 - PS_DDR_DQ20
Bank 504 - PS_DDR_DQ21
Bank 504 - PS_DDR_DQ22
Bank 504 - PS_DDR_DQ23
Bank 504 - PS_DDR_DQ24
Bank 504 - PS_DDR_DQ25
Bank 504 - PS_DDR_DQ26
Bank 504 - PS_DDR_DQ27
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Appendix B: Master Constraints File Listing
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