Typical System Block Diagrams; 16-Bit Mc68000 Mpu; Figure 1: 16-Bit 68000 Series - Epson S1D13503 Technical Manual

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3 TYPICAL SYSTEM BLOCK DIAGRAMS

The following figures show typical system implementations of the S1D13503. All of the following block diagrams are
shown without SRAM or LCD display. Refer to the interface specific Application Notes for complete details.

3.1 16-Bit MC68000 MPU

MC68000
A20 to A23
FC0 to FC1
A1 to A19
D0 to D15
S1D13503
X18A-A-001-08
Downloaded from Elcodis.com electronic components distributor
A14 to A16
A10 to A19
DTACK#
UDS#
LDS#
AS#
R/W#
(example implementation only - actual may vary)
Decoder
Decoder

Figure 1: 16-Bit 68000 Series

Epson Research and Development
Vancouver Design Center
S1D13503
MEMCS#
IOCS#
AB1 to AB19
DB0 to DB15
READY
AB0
BHE#
IOR#
IOW#
Hardware Functional Specification
Issue Date: 01/01/29