About The Programmer's Model - ARM ARM9TDMI Technical Reference Manual

General-purpose microprocessors
Table of Contents

Advertisement

Programmer's Model
2.1

About the programmer's model

2.1.1
Data abort model
2-2
The ARM9TDMI processor core implements ARM Architecture v4T, and so executes
the ARM 32-bit instruction set and the compressed Thumb 16-bit instruction set. The
programmer's model is fully described in the ARM Architecture Reference Manual.
The ARM v4T architecture specifies a small number of implementation options. The
options selected in the ARM9TDMI implementation are listed in the table below. For
comparison, the options selected for the ARM7TDMI implementation are also shown:
Processor
ARM
core
architecture
ARM7TDMI
v4T
ARM9TDMI
v4T
The ARM9TDMI is code compatible with the ARM7TDMI, with two exceptions:
The ARM9TDMI implements the Base Restored Data Abort model, which
significantly simplifies the software data abort handler.
The ARM9TDMI fully implements the instruction set extension spaces added to
the ARM (32-bit) instruction set in Architecture v4 and v4T.
These differences are explained in more detail below.
The ARM9TDMI implements the Base Restored Data Abort Model, which differs from
the Base updated data abort model implemented by ARM7TDMI.
The difference in the Data Abort Model affects only a very small section of operating
system code, the data abort handler. It does not affect user code. With the Base Restored
Data Abort Model, when a data abort exception occurs during the execution of a
memory access instruction, the base register is always restored by the processor
hardware to the value the register contained before the instruction was executed. This
removes the need for the data abort handler to 'unwind' any base register update which
may have been specified by the aborted instruction.
The Base Restored Data Abort Model significantly simplifies the software data abort
handler.
Copyright © 1998, 1999 ARM Limited. All rights reserved.
Table 2-1 ARM9TDMI implementation option
Data abort model
Base updated
Base restored
Value stored by direct
STR, STRT, STM of PC
Address of Inst + 12
Address of Inst + 12
ARM DDI0145B

Advertisement

Table of Contents
loading

Table of Contents