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ARM9TDMI AC Characteristics
Timing parameter
Tdqir
Tdrbsd
Tdrbsh
Tdrwd
Tdrwh
Tdsqd
Tdsqh
Tdtrsd
Tdtrsh
Tdwph
Tdwps
Tedqd
Tedqh
Texth
Texts
Tgclkh
Tgclkl
Tgekf
Tgekr
Thivh
Thivs
Tiabe
Tiabh
Tiabs
Tiabz
8-16
Description
nTRST falling to DBGRQI falling delay
DRIVEOUTBS delay from TCK falling
DRIVEOUTBS hold time from TCK falling
DnRW delay from GCLK rising
DnRW hold time from GCLK rising
DSEQ delay from GCLK rising
DSEQ hold time from GCLK rising
DnTRANS delay from GCLK rising
DnTRANS hold time from GCLK rising
DEWPT hold time from GCLK rising
DEWPT setup time to GCLK rising
DBGRQI output delay from EDBGRQ changing
DBGRQI output hold time from EDBGRQ changing
EXTERN0/EXTERN1 input hold time from GCLK falling
EXTERN0/EXTERN1 input setup time to GCLK falling
Minimum GCLK HIGH period
Minimum GCLK LOW period
GCLK falling to ECLK falling delay
GCLK rising to ECLK rising delay
HIVECS hold time from GCLK rising
HIVECS setup time to GCLK rising
Delay from IABE rising to IA[31:1]/InM[4:0]/InTRANS driven valid
IABORT hold time from GCLK falling
IABORT setup time to GCLK falling
Delay from IABE falling to IA[31:1]/InM[4:0]/InTRANS high impedance
Copyright © 1998, 1999 ARM Limited. All rights reserved.
Table 8-1 ARM9TDMI timing parameters (continued)
ARM DDI0145B
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