Table of Contents
Advertisement
Debug Support
5.7
ARM9TDMI core clocks
5-26
The ARM9TDMI has two clocks, the memory clock GCLK, and an internally TCK
generated clock, DCLK. During normal operation, the core is clocked by GCLK, and
internal logic holds DCLK LOW. When the ARM9TDMI is in the debug state, the core
is clocked by DCLK under control of the TAP state machine, and GCLK may free run.
The selected clock is output on the ECLK signal for use by the external system.
Note
When the core is being debugged and is running from DCLK, nWAIT has no effect.
The two cases in which the clocks switch are during debugging and during testing.
Copyright © 1998, 1999 ARM Limited. All rights reserved.
ARM DDI0145B
Advertisement
Table of Contents
