Interrupt Controller Block; Interrupt Controller Overview - Motorola DragonBall MC68328 User Manual

Integrated processor
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System Integration Module
BETO
Bus-Error Timeout
This status bit is set when the bus-error timer times out. Writing a 1 to this bit clears it while
writing a 0 has no effect.
WPV
Write-Protect Violation
This status bit is set when a write-protection violation occurs; that is, when there is a write
to a write-protected area. Writing a 1 to this location clears the status bit while writing a 0
has no effect.
PRV
Privilege Violation
This status bit is set when accessing a supervisor-only area in user mode. Writing a 1 to
this bit clears the status bit while writing a 0 has no effect.
BETEN
Bus-Error Timeout Enable
The bus-error timeout function is enabled when this control bit is set. BERR is asserted
on the bus cycle if the bus timer reaches the terminal count and the DTACK is not assert-
ed.
SO
Supervisor Only
This supervisor-only control bit limits the on-chip register accesses to supervisor only.
Writing a 1 to this location sets to supervisor-only mode. Clearing this bit allows both su-
pervisor and user to access the on-chip registers.
DMAP
Double Map
If this bit is set, the register is mapped at $FFFFF000-$FFFFFFFF and $FFF000-
$FFFFFF. If the bit is cleared, the register is mapped at $FFFFF000-$FFFFFFFF only.
This bit is set to 1 after reset.
RSVD
Reserved
Reserved bit. Should be 0 in normal operating mode.
WDTH8
8-Bit Width Select
This control bit should be set to 1 when the system is an 8-bit only system. This allows
D7-D0 pins to be used for port B I/O.

2.3 INTERRUPT CONTROLLER BLOCK

The interrupt controller supports a variety of interrupts, both internal and external. This block
prioritizes and encodes pending interrupts. It also generates vectors during the interrupt-
acknowledge cycle.

2.3.1 Interrupt Controller Overview

The interrupt-controller block supports 23 interrupts. Both edge- and level-sensitive inter-
rupts are supported. A programmable vector can be generated for each interrupt level. Inter-
rupt sources include the following:
2-6
MC68328 DRAGONBALL PROCESSOR USER'S MANUAL
MOTOROLA

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