Postdecrement By Offset Nn; Address Register Indirect — Postincrement - Motorola DSP56000 Manual

24-bit digital signal processor
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EXAMPLE: MOVE B0,Y: (R1)+
BEFORE EXECUTION
B2
B1
55 48 47
A
F
6
5 4
3
2
7
0 23
$2501
$2500
Assembler Syntax: (Rn)+
Memory Spaces: P:, X:, Y:, XY:, L:
Additional Instruction Execution Time (Clocks): 0
Additional Effective Address Words: 0
Figure 4-5 Address Register Indirect — Postincrement
Rn without an associated data move.
4.4.1.5

Postdecrement By Offset Nn

The address of the operand is in the address register, Rn (see Table 4-1 and Figure 4-8).
After the operand address is used, it is decremented by the contents of the Nn register
and stored in the same address register. The contents of the Nn register are unchanged.
This mode cannot be used for making XY: memory references, but it can be used to mod-
MOTOROLA
ADDRESSING
B0
24 23
0
1
F
E D C B A
0 23
0
Y MEMORY
23
0
X X X X X X
X X X X X X
15
0
R1
$2500
15
0
N1
XXXX
15
0
M1
$FFFF
ADDRESS GENERATION UNIT
AFTER EXECUTION
B2
B1
B0
55 48 47
24 23
A
F
6
5
4
3
2
1 F
7
0 23
0 23
23
$2501
$2500
0
E
D C
B
A
0
Y MEMORY
0
X X X X X X X
$ F E D C B A
15
0
R1
$2501
15
0
N1
XXXX
15
0
M1
$FFFF
4 - 11

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