Data Alu A And B Accumulators; Mac Unit - Motorola DSP56000 Manual

OVERVIEW AND DATA ALU ARCHITECTURE
24 BITS
48 BITS
56 BITS
ACCUMULATOR A

3.2.3 Data ALU A and B Accumulators

The Data ALU features two general-purpose, 56-bit accumulators, A and B. Each con-
sists of three concatenated registers (A2:A1:A0 and B2:B1:B0, respectively). The 8-bit
sign extension (EXT) is stored in A2 or B2 and is used when more than 48-bit accuracy is
needed; the 24-bit most significant product (MSP) is stored in A1 or B1; the 24-bit least
MOTOROLA
X0,X1,
Y0, OR Y1 Y0, OR Y1
24-BITx24-BIT
FRACTIONAL
MULTIPLIER
S
H
I
+
F
–
T
E
R
CONVERGENT - ROUNDING
FORCING FUNCTION
Figure 3-3 MAC Unit
DATA ARITHMETIC LOGIC UNIT
X0,X1,
56 - BIT
ARITHMETIC AND
LOGIC UNIT
SCALING
MODE BITS
CONDITION
CODE GENERATOR
ACCUMULATOR B
X0,X1,
Y0, OR Y1
R
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