Motorola DSP56000 Manual page 220

24-bit digital signal processor
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ecution. The EX bit causes the OnCE controller to release the chip from the debug
mode and the status bits in OSCR are cleared. The GO bit causes the chip to start
executing the jump instruction which will then cause the chip to continue instruction
execution from the target address. Note that the trace counter will count the jump
instruction so the current trace counter may need to be corrected if the trace mode
is enabled.
10.11.7 Debugging Multiprocessor Systems With a Single External Command
Controller
In multiprocessor systems, each processor may be individually debugged as described
above. When simultaneous exit of the debug state is desired for more than one processor,
each processor must first be loaded with the required PIL and PDB values where process-
ing should proceed. This is accomplished by the following sequence as applied to each
processor:
1. Send command WRITE PDB REGISTER, no GO, no EX (00001001)
The OnCE controller selects PDB as destination for serial data. Also, the OnCE
controller selects the on-chip PAB register as the source for the PAB bus.
2. ACK
3. Send 24 bits of either the opcode of a 2-word jump instruction or the saved PIL val-
ue. After the 24 bits have been received, the PDB register drives the PDB. The
OnCE controller causes the PIL to latch the PDB value.
4. ACK
5. Send command WRITE PDB REGISTER, no GO, no EX (00001001)
The OnCE controller selects PDB as destination for serial data.
6. ACK
7. Send 24 bits of either the jump target absolute address ($xxxxxx) or the saved PDB
value. After 24 bits have been received, the PDB register drives the PDB.
8. ACK
At this point, all processors should have the required PIL and PDB values while still in de-
bug mode. To return all processors to the normal execution state simultaneously, the fol-
lowing command should be issued to all processors in parallel:
9. Send command NO REGISTER SELECTED, GO, EX (01111111)
The OnCE controller releases the chips from the debug mode and instruction exe-
cution is resumed.
10- 28
USING THE OnCE
ON-CHIP EMULATION (OnCE)
MOTOROLA

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