Eor - Motorola DSP56000 Manual

EOR

Operation:
⊕
S D[47:24]
⊕
where denotes the logical Exclusive OR operator
Description: Logically exclusive OR the source operand S with bits 47–24 of the desti-
nation operand D and store the result in bits 47–24 of the destination accumulator. This
instruction is a 24-bit operation. The remaining bits of the destination operand D are not
affected.
Example:
:
EOR Y1,B1
:
Before Execution
Y1
B
$00:000005:000000
Explanation of Example: Prior to execution, the 24-bit Y1 register contains the value
$000003, and the 56-bit B accumulator contains the value $00:000005:000000. The
EOR Y1,B instruction logically exclusive ORs the 24-bit value in the Y1 register with bits
47–24 of the B accumulator (B1) and stores the result in the B accumulator with bits 55–
48 and 23–0 unchanged.
Condition Codes:
15 14 13
LF DM
S — Computed according to the definition in A.5 CONDITION CODE COMPUTATION
L — Set if data limiting has occurred during parallel move
N — Set if bit 47 of A or B result is set
Z— Set if bits 47 - 24 of A or B result are zero
V — Always cleared
A - 100
INSTRUCTION DESCRIPTIONS
Logical Exclusive OR
D[47:24] (parallel move)
(R2)+ ;Exclusive OR Y1 with B1, update R2
$000003
12 11 10 9
**
T S1 S0 I1
MR
INSTRUCTION SET DETAILS
Assembler Syntax:
EOR S,D (parallel move)
After Execution
Y1
B $00:000006:000000
8 7 6 5 4
I0 S L E U
CCR
EOR
$000003
3 2 1 0
N Z V C
MOTOROLA