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ORI
Operation:
#xx+D
D
where + denotes the logical inclusive OR operator
Description: Logically OR the 8-bit immediate operand (#xx) with the contents of the
destination control register D and store the result in the destination control register. The
condition codes are affected only when the condition code register is specified as the
destination operand.
Restrictions: The ORI #xx,MR instruction cannot be used immediately before an
ENDDO or RTI instruction and cannot be one of the last three instructions in a DO loop
(at LA–2, LA–1, or LA).
Example:
:
OR #$8,MR
:
Before Execution
MR
Explanation of Example: Prior to execution, the 8-bit mode register (MR) contains the
value $03. The OR #$8,MR instruction logically ORs the immediate 8-bit value $8 with
the contents of the mode register and stores the result in the mode register.
Condition Codes:
5
14
13
1
LF
DM
For CCR operand:
S — Set if bit 7 of the immediate operand is set
L — Set if bit 6 of the immediate operand is set
E — Set if bit 5 of the immediate operand is set
U — Set if bit 4 of the immediate operand is set
N — Set if bit 3 of the immediate operand is set
Z — Set if bit 2 of the immediate operand is set
V — Set if bit 1 of the immediate operand is set
C — Set if bit 0 of the immediate operand is set
A - 246
INSTRUCTION DESCRIPTIONS
OR Immediate with Control Register
;set scaling mode bit S1 to scale up
$03
12
11
10
9
T
**
S1
S0
I1
MR
INSTRUCTION SET DETAILS
Assembler Syntax:
OR(I)
After Execution
MR
$0B
8
7
6
5
4
I0
S
L
E
U
CCR
ORI
#xx,D
3
2
1
0
N
Z
V
C
MOTOROLA
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