Once Memory Breakpoint Logic - Motorola DSP56000 Manual

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10.4.2 Memory Upper Limit Register (OMULR)
The 16-bit Memory Upper Limit Register stores the memory breakpoint upper limit. The
OMULR can be read or written through the OnCE serial interface. Before enabling break-
points, OMULR must be loaded by the external command controller.
10.4.3 Memory Lower Limit Register (OMLLR)
The 16-bit Memory Lower Limit Register stores the memory breakpoint lower limit. The
OMLLR can be read or written through the OnCE serial interface. Before enabling break-
MOTOROLA

OnCE MEMORY BREAKPOINT LOGIC

PAB XAB YAB
MEMORY ADDRESS LATCH
HIGH ADDRESS COMPARATOR
UPPER LIMIT REGISTER
LOW ADDRESS COMPARATOR
LOWER LIMIT REGISTER
BREAKPOINT COUNTER
COUNT=0
Figure 10-6 OnCE Memory Breakpoint Logic
ON-CHIP EMULATION (OnCE)
MEMORY BUS SELECT
LOWER
BC3-BC0
OR
EQUAL
MEMORY
BREAKPOINT
SELECTION
HIGHER
OR
EQUAL
BREAKPOINT
OCCURRED
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DEC
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ISBKPT
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