Motorola DSP56000 Manual page 524

24-bit digital signal processor
Hide thumbs Also See for DSP56000:
Table of Contents

Advertisement

REP
Notes: If A or B is specified as the destination operand, the following sequence of events
takes place:
1. The S bit is computed according to its definition (See Section A.5 CON-
DITION CODE COMPUTATION)
2. The accumulator value is scaled according to the scaling mode bits S0
and S1 in the status register (SR).
3. If the accumulator extension is in use, the output of the shifter is limited
to the maximum positive or negative saturation constant, and the L bit is
set.
4. The LS 16 bits of the resulting 24 bit value is loaded into the loop
counter (LC). The original contents of A or B are not changed.
If the system stack register SSH is specified as a source operand, the system stack
pointer (SP) is postdecremented by 1 after SSH has been read.
Timing: 4 oscillator clock cycles
Memory: 1 program word
MOTOROLA
INSTRUCTION SET DESCRIPTIONS
Repeat Next Instruction
INSTRUCTION SET DETAILS
REP
A - 255

Advertisement

Table of Contents
loading

This manual is also suitable for:

Dsp56k

Table of Contents