Dsp56K Block Diagram - Motorola DSP56000 Manual

24-bit digital signal processor
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PERIPHERAL
MODULES
24-Bit
56K Mod-
INTERNAL
DATA
BUS
SWITCH
PLL
PROGRAM
INTERRUPT
CLOCK
CONTROLLER
GENERATOR
DSI/OS0 pin is an output when the processor is not in debug mode. When switching from
output to input, the pin is three-stated. During hardware reset, this pin is defined as an out-
put and it is driven low.
Note: To avoid possible glitches, an external pull-down resistor should be attached to this
pin.
MOTOROLA
ON-CHIP EMULATION (OnCE) PINS
PROGRAM
RAM/ROM
EXPANSION
YAB
ADDRESS
XAB
GENERATION
PAB
UNIT
YDB
XDB
PDB
GDB
PROGRAM
PROGRAM
DECODE
ADDRESS
GENERA TOR
CONTROLLER
Program Control Unit
MODC/NMI
MODB/IRQB
MODA/IRQA
RESET
Figure 10-2 DSP56K Block Diagram
ON-CHIP EMULATION (OnCE)
X MEMORY
Y MEMORY
RAM/ROM
RAM/ROM
EXPANSION
EXPANSION
DATA ALU
24X24 + 56 → 56-BIT MAC
TWO 56-BIT ACCUMULATORS
EXPANSION
AREA
EXTERNAL
ADDRESS
BUS
SWITCH
BUS
CONTROL
EXTERNAL
DATA BUS
SWITCH
OnCE
16 BITS
24 BITS
10 - 5

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