Bchg - Motorola DSP56000 Manual

24-bit digital signal processor

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BCHG

Description: Test the n

result in the destination location. The state of the n

condition code register. The bit to be tested is selected by an immediate bit number from

0–23. This instruction performs a read-modify-write operation on the destination location

using two destination accesses before releasing the bus. This instruction provides a test-

and-change capability which is useful for synchronizing multiple processors using a

shared memory. This instruction can use all memory alterable addressing modes.

#$7,X:<<$FFE2

Before Execution

INSTRUCTION DESCRIPTIONS

Bit Test and Change

bit of the destination operand D, complement it, and store the

;test and change bit 7 in I/O Port B DDR

INSTRUCTION SET DETAILS

Assembler Syntax:

bit is stored in the carry bit C of the

After Execution

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