DEBUGcc
Example:
:
CMP
Y0,
B
DEBUGge
:
Explanation of Example: The results of the comparison between Y0 and B will be
recorded in the status register bits. The conditional debug instruction looks at the condi-
tions (for greater than or equal in this case) and if they are met (N
DEBUG instruction will be executed. The chip enters the debug mode after the instruc-
tion following the DEBUG instruction has entered the instruction latch. The chip pulses
low the DSO line to inform the external command controller that it has entered the debug
mode and that the chip is waiting for commands.
Instruction Format:
DEBUGcc
Opcode:
23
0
0
0
0
Instruction Fields:
Mnemonic
c c c c
CC (HS)
0
0 0 0
GE
0
0 0 1
NE
0
0 1 0
PL
0
0 1 1
NN
0
1 0 0
EC
0
1 0 1
LC
0
1 1 0
GT
0
1 1 1
Timing: 4 oscillator clock cycles
Memory: 1 program word
MOTOROLA
INSTRUCTION DESCRIPTIONS
Enter Debug Mode Conditionally
; Compare register Y0 with the B accumulator.
; Enter the debug mode if
; the previous test result is "greater than".
16 15
0
0
0
0
0
0
0
Mnemonic
CS (LO)
LT
EQ
MI
NR
ES
LS
LE
INSTRUCTION SET DETAILS
8
7
0
0
0
1
1
0
0
c c c c
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
DEBUGcc
⊕
V=0) then the
0
0
0
c
c
c
c
A - 79