Overview And Data Alu Architecture; Section 3.2 Overview And Data Alu Architecture; Dsp56K Block Diagram - Motorola DSP56000 Manual

OVERVIEW AND DATA ALU ARCHITECTURE

PERIPHERAL
MODULES
24 Bit 56K
Module
INTERNAL
DATA
BUS
SWITCH
PLL
PROGRAM
INTERRUPT
CLOCK
CONTROLLER
GENERATOR
The following paragraphs describe each of these components and provide a description
of data representation, rounding, and saturation arithmetic.
3 - 4
PROGRAM
RAM/ROM
EXPANSION
YAB
ADDRESS
XAB
GENERATION
PAB
UNIT
YDB
XDB
PDB
GDB
PROGRAM
PROGRAM
ADDRESS
DECODE
GENERA TOR
CONTROLLER
Program Control Unit
MODC/NMI
MODB/IRQB
MODA/IRQA
RESET
Figure 3-1 DSP56K Block Diagram
DATA ARITHMETIC LOGIC UNIT
X MEMORY Y MEMORY
RAM/ROM RAM/ROM
EXPANSION EXPANSION
DATA ALU
24X24 + 56 → 56-BIT MAC
TWO 56-BIT ACCUMULATORS
EXPANSION
AREA
EXTERNAL
ADDRESS
BUS
SWITCH
BUS
CONTROL
EXTERNAL
DATA BUS
SWITCH
OnCE™
16 BITS
24 BITS
MOTOROLA