Motorola DSP56000 Manual page 510

24-bit digital signal processor
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NORM
cess in the R3 address register. A negative value reflects the number of left shifts
performed; a positive value reflects the number of right shifts performed during the nor-
malization process.
Condition Codes:
5
14
13
1
LF
DM
L — Set if overflow has occurred in A or B result
E — Set if the signed integer portion of A or B result is in use
U — Set if A or B result is unnormalized
N — Set if bit 55 of A or B result is set
Z — Set if A or B result equals zero
V — Set if bit 55 is changed as a result of a left shift
Note: The definitions of the E and U bits vary according to the scaling mode being used.
Refer to Section A.5 CONDITION CODE COMPUTATION for complete details.
Instruction Format:
NORM
Rn,D
Opcode:
23
0
0
0
0
Instruction Fields:
D d
Rn
A 0
Rn
B 1
where "nnn" = Rn number
Timing: 2 oscillator clock cycles
Memory: 1 program word
MOTOROLA
INSTRUCTION SET DESCRIPTIONS
Normalize Accumulator Iteration
12
11
10
9
T
**
S1
S0
I1
MR
16 15
0
0
0
1
1
1
0
R R R
n n n
INSTRUCTION SET DETAILS
8
7
6
5
4
I0
S
L
E
U
CCR
8
7
1
1
R
R
R
0
NORM
3
2
1
0
N
Z
V
C
0
0
0
1
d
1
0
1
A - 241

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