Notes: If A or B is specified as the destination operand, the following sequence of events
1. The S bit is computed according to its definition (See Section A.5)
2. The accumulator value is scaled according to the scaling mode bits S0
and S1 in the status register (SR).
3. If the accumulator extension is in use, the output of the shifter is limited
to the maximum positive or negative saturation constant, and the L bit is
4. The LS 16 bits of the resulting 24 bit value is loaded into the loop
counter (LC). The original contents of A or B are not changed.
Timing: 6+mv oscillator clock cycles
Memory: 2 program words
Start Hardware Loop
INSTRUCTION SET DETAILS
A - 97