Program Control Registers; Reading And Writing Control Registers - Motorola DSP56000 Manual

24-bit digital signal processor
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address modifier registers, M0–M7.
MR, CCR, OMR, AND SP
AS A DESTINATION
MR, CCR, OMR, AND SP
AS A SOURCE
LC, LA, SR, SSH, AND SSL
AS A DESTINATION
LC, LA, SR, SSH, AND SSL
AS A SOURCE
Figure 6-6 Reading and Writing Control Registers
6.3.2.3

Program Control Registers

The 8-bit operating mode register (OMR) may be accessed as a word operand. However,
not all eight bits are defined, and those that are defined will vary depending on the
DSP56K family member. In general, undefined bits are written as "don't care" and read as
zero.
The 16-bit SR has the system mode register (MR) occupying the high-order eight bits and
6 - 8
INSTRUCTION FORMATS
23
NOT USED
23
ZERO FILL
(a) 16 Bit
23
LSB OF
NOT USED
WORD
15
23
16 15
ZERO FILL
(b) 8 Bit
INSTRUCTION SET INTRODUCTION
8 7
0
BUS
LSB
A2
MR, CCR, OMR, AND SP
8 7
0
BUS
0
BUS
0
LC, LA, SR, SSH, AND SSL
0
BUS
MOTOROLA

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