Motorola DSP56000 Manual page 323

24-bit digital signal processor
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BCLR
Instruction Format:
BCLR
#n,D
Opcode:
23
0
0
0
0
Instruction Fields:
#n=bit number=bbbbb,
D=destination register=DDDDDD
xxxx=16-bit Absolute Address in extension word
Destination Register
4 registers in Data ALU
8 accumulators in Data ALU
8 address registers in AGU
8 address offset registers in AGU
8 address modifier registers in AGU
8 program controller registers
See Section A.10 and Table A-18 for specific register encodings.
A - 54
INSTRUCTION DESCRIPTIONS
Bit Test and Clear
16 15
1
0
1
0
1
1
D
D D D D D D
0 0 0 1 D D
0 0 1 D D D
0 1 0 T T T
0 1 1 N N N
1 0 0 F F F
1 1 1 G G G
INSTRUCTION SET DETAILS
8
7
D
D
D
D
D
0
1
Bit Number bbbbb
BCLR
0
0
b
b
b
b
b
00000
10111
MOTOROLA

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