Jcc
Effective
Addressing Mode
(Rn)-Nn
(Rn)+Nn
(Rn)-
(Rn)+
(Rn)
(Rn+Nn)
-(Rn)
Absolute Address
where "rrr" refers to an address register R0-R7
Mnemonic
C C C C
CC (HS)
0
0 0 0
GE
0
0 0 1
NE
0
0 1 0
PL
0
0 1 1
NN
0
1 0 0
EC
0
1 0 1
LC
0
1 1 0
GT
0
1 1 1
Timing: 4+jx oscillator clock cycles
Memory: 1+ea program words
MOTOROLA
INSTRUCTION DESCRIPTIONS
Jump Conditionally
M M M R R R
0 0 0 r r r
0 0 1 r r r
0 1 0 r r r
0 1 1 r r r
1 0 0 r r r
1 0 1 r r r
1 1 1 r r r
1 1 0 0 0 0
Mnemonic
CS (LO)
LT
EQ
MI
NR
ES
LS
LE
INSTRUCTION SET DETAILS
C C C C
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
Jcc
A - 109