Signals Identified By Functional Group; Grounds - Motorola DSP56303 User Manual

V
CCP
4
V
CCQ
4
V
CCA
4
V
CCD
2
V
CCC
V
CCH
2
V
CCS
GND
P
GND
P1
4
GND
Q
4
GND
A
4
GND
D
2
GND
C
GND
H
2
GND
S
EXTAL
XTAL
CLKOUT
PCAP
PINIT/NMI
18
A[0–17]
24
D[0–23]
AA0/RAS0–
4
AA3/RAS3
RD
WR
TA
BR
BG
BB
CAS
BCLK
BCLK
Note: 1. The HI08 port supports a non-multiplexed or a multiplexed bus, single or double Data Strobe (DS), and single or
double Host Request (HR) configurations. Since each mode is configured independently, any combination of these
modes is possible. These HI08 signals can also be configured as GPIO signals (PB[0–15]). Signals with dual
designations (for example, HAS/HAS) have configurable polarity.
2. The ESSI0, ESSI1, and SCI signals are multiplexed with the Port C GPIO signals (PC[0–5]), Port D GPIO signals
(PD[0–5]), and Port E GPIO signals (PE[0–2]), respectively.
3. TIO[0–2] can be configured as GPIO signals.
2-2
DSP56303
Power Inputs:
PLL
Internal Logic
Address Bus
Data Bus
Bus Control
HI08
ESSI/SCI/Timer

Grounds:

PLL
PLL
Internal Logic
Address Bus
Data Bus
Bus Control
HI08
ESSI/SCI/Timer
Synchronous Serial
Interface Port
Clock
PLL
Synchronous Serial
Interface Port 1
Port A
External
Address Bus
Communications
External
Interface (SCI) Port
Data Bus
External
Bus
Control
Figure 2-1. Signals Identified by Functional Group
DSP56303 User's Manual
MODA/IRQA
MODB/IRQB
Interrupt/
MODC/IRQC
Mode
MODD/IRQD
Control
RESET
Non-Multiplexed
Bus
8
H[0–7]
HA0
Host
HA1
Interface
HA2
1
(HI08) Port
HCS/HCS
Single DS
HRW
HDS/HDS
Single HR
HREQ/HREQ
HACK/HACK
3
Enhanced
SC0[0–2]
SCK0
0
SRD0
2
(ESSI0)
STD0
3
Enhanced
SC1[0–2]
SCK1
SRD1
2
(ESSI1)
STD1
Serial
RXD
TXD
2
SCLK
TIO0
3
Timers TIO1
TIO2
TCK
TDI
JTAG/OnCE
TDO
Port
TMS
TRST
DE
Multiplexed Port B
Bus GPIO
HAD[0–7] PB[0–7]
HAS/HAS PB8
HA8 PB9
HA9 PB10
HA10 PB13
Double DS
HRD/HRD PB11
HWR/HWR PB12
Double HR
HTRQ/HTRQ PB14
HRRQ/HRRQ PB15
Port C GPIO
PC[0–2]
PC3
PC4
PC5
Port D GPIO
PD[0–2]
PD3
PD4
PD5
Port E GPIO
PE0
PE1
PE2
Timer GPIO
TIO0
TIO1
TIO2