Motorola DSP56000 Manual page 424

24-bit digital signal processor
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MACR
Explanation of Example 1: Prior to execution, the 24-bit X0 register contains the value
$123456 (0.142222166), the 24-bit Y0 register contains the value $123456
(0.142222166), and the 56-bit B accumulator contains the value $00:100000:000000
(0.125). The execution of the MACR X0,Y0,B instruction multiples the 24-bit signed
value in the X0 register by the 24-bit signed value in the Y0 register, adds the resulting
product to the 56-bit B accumulator, rounds the result into the B1 portion of the accumu-
lator, and then zeros the B0 portion of the accumulator (X0
approximately
=$00:1296CD:9619C8,
$00:1296CE:000000=0.145227193832397=B).
Condition Codes:
15
14
13
LF
DM
S — Computed according to the definition in A.5 CONDITION CODE COMPUTATION
L — Set if limiting (parallel move) or overflow has occurred in result
E — Set if the signed integer portion of A or B result is in use
U — Set if A or B result is unnormalized
N — Set if bit 55 of A or B result is set
Z— Set if A or B result equals zero
V — Set if overflow has occurred in A or B result
Note: The definitions of the E and U bits vary according to the scaling mode being used.
Refer to Section A.5 for complete details.
Instruction Format 1:
±
MACR
(
)S1,S2,D
±
MACR
(
)S2,S1,D
Opcode 1:
23
MOTOROLA
INSTRUCTION DESCRIPTIONS
Signed Multiply-Accumulate and Round
12
11
10
9
T
S1
S0
I1
**
MR
DATA BUS MOVE FIELD
OPTIONAL EFFECTIVE ADDRESS EXTENSION
INSTRUCTION SET DETAILS
Y0+B=0.145227144519197
which
is
rounded
8
7
6
5
4
I0
S
L
E
U
CCR
8
7
1
Q
Q
MACR
to
the
3
2
1
0
N
Z
V
C
4
3
0
d
k
1
1
Q
A - 155
value

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