Motorola DSP56000 Manual page 452

24-bit digital signal processor
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X:R
Condition Codes:
15
14
13
LF
DM
S — Computed according to the definition in A.5 CONDITION CODE COMPUTATION
L — Set if data limiting has occurred during parallel move.
Class I Instruction Format:
( . . . . . ) X:ea,D1
( . . . . . ) S1,X:ea
( . . . . . ) #xxxxxx,
Opcode:
23
0
0
0
1
Instruction Fields:
ea=6-bit Effective Address=MMMRRR
Register W
Read S
0
Write D 1
where "rrr" refers to an address register R0–R7
MOTOROLA
INSTRUCTION DESCRIPTIONS
X Memory and Register Data Move
12
11
10
9
T
**
S1
S0
I1
MR
S2,D2
S2, D2
S2,D2
16
15
f
f
d
f
W
0
M
OPTIONAL EFFECTIVE ADDRESS EXTENSION
Effective
Addressing Mode M M M R R R
(Rn)-Nn
(Rn)+Nn
(Rn)-
(Rn)+
(Rn)
(Rn+Nn)
-(Rn)
Absolute address
Immediate data
INSTRUCTION SET DETAILS
8
7
6
5
4
I0
S
L
E
U
CCR
8
7
M
M
R
R
R
0
0 0 r r
r
0
0 1 r r
r
0
1 0 r r
r
0
1 1 r r
r
1
0 0 r r
r
1
0 1 r r
r
1
1 1 r r
r
1
1 0 0 0 0
1
1 0 1 0 0
X:R
3
2
1
0
N
Z
V
C
0
INSTRUCTION OPCODE
A - 183

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