Absolute Short; I/O Short; Implicit Reference; Addressing Modes Summary - Motorola DSP56000 Manual

24-bit digital signal processor
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EXAMPLE: MOVE Y:$5432,B0
BEFORE EXECUTION
B2
B1
55
48 47
X
X
X X X X X X
7
0 23
$5432
Assembler Syntax: XXXX or aa
Memory Spaces: P:
Additional Instruction Execution Time (Clocks): 2
Additional Effective Address Words: 1
Figure 6-8 Special Addressing – Absolute Addressing
6.3.5.3.5

Absolute Short

The address of the operand occupies six bits in the instruction operation word, allowing
addresses $0000–$003F to be accessed (see Figure 6-11). Classified as both a memory
reference and program reference, the address is zero extended to 16 bits when used to
address an operand or program memory.
6.3.5.3.6

I/O Short

Classified as a memory reference, the I/O short addressing mode is similar to absolute
short addressing. The address of the operand occupies six bits in the instruction operation
word. I/O short is used with the bit manipulation and MOVEP instructions. The I/O short
address is ones extended to 16 bits to address the I/O portion of X and Y memory
(addresses $FFC0–$FFFF – see Figure 6-12).
6.3.5.3.7

Implicit Reference

Some instructions make implicit reference to PC, SS, LA, LC, or SR. For example, the
jump instruction (JMP) implicitly references the PC; whereas, the repeat next instruction
(REP) implicitly references LC. The registers implied and their uses are defined by the
individual instruction descriptions (see APPENDIX A - INSTRUCTION SET DETAILS).
6.3.5.4

Addressing Modes Summary

MOTOROLA
INSTRUCTION FORMATS
B0
24 23
0
X X X X X X
0 23
0
23 Y MEMORY 0
A B C D E F
INSTRUCTION SET INTRODUCTION
AFTER EXECUTION
B2
B1
55
48 47
X
X
X X X X X X
7
0 23
$5432
B0
24 23
0
A B C D E F
0 23
0
23 Y MEMORY 0
A B C D E F
6 - 17

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