Address Buses; Section 2.3 Address Buses - Motorola DSP56000 Manual

PERIPHERAL
MODULES
24-Bit 56K
Module
INTERNAL
DATA
BUS
SWITCH
PLL
PROGRAM
INTERRUPT
CLOCK
CONTROLLER
GENERATOR
2.3

ADDRESS BUSES

Addresses are specified for internal X data memory and Y data memory on two unidirec-
tional 16-bit buses — X address bus (XAB) and Y address bus (YAB). Program memory
addresses are specified on the bidirectional program address bus (PAB). External mem-
2- 4 DSP56K CENTRAL ARCHITECTURE OVERVIEW
ADDRESS BUSES
PROGRAM
RAM/ROM
EXPANSION
YAB
ADDRESS
XAB
GENERATION
PAB
UNIT
YDB
XDB
PDB
GDB
PROGRAM
PROGRAM
ADDRESS
DECODE
GENERA TOR
CONTROLLER
Program Control Unit
MODC/NMI
MODB/IRQB
MODA/IRQA
RESET
Figure 2-1 DSP56K Block Diagram
X MEMORY Y MEMORY
RAM/ROM RAM/ROM
EXPANSION EXPANSION
DATA ALU
24X24 + 56 → 56-BIT MAC
TWO 56-BIT ACCUMULATORS
EXPANSION
AREA
EXTERNAL
ADDRESS
BUS
SWITCH
BUS
CONTROL
EXTERNAL
DATA BUS
SWITCH
OnCE™
16 BITS
24 BITS
MOTOROLA