Agu Registers; Reading And Writing The Alu Extension Registers; Reading And Writing The Address Alu Registers - Motorola DSP56000 Manual

24-bit digital signal processor
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REGISTER A2, B2 USED
AS A DESTINATION
REGISTER A2, B2
USED AS A SOURCE
Figure 6-4 Reading and Writing the ALU Extension Registers
ADDRESS ALU REGISTERS
AS A DESTINATION
ADDRESS ALU REGISTERS
AS A SOURCE
Figure 6-5 Reading and Writing the Address ALU Registers
6.3.2.2

AGU Registers

The 24 AGU registers are 16 bits wide. They may be accessed as word operands for
address, address modifier, and data storage. When used as a source operand, these reg-
isters occupy the low-order portion of the 24-bit word; the high-order portion is read as
zeros (see Figure 6-5). When used as a destination operand, these registers receive the
low-order portion of the word; the high-order portion is not used. The notation "Rn" desig-
nates one of the eight address registers, R0–R7; the notation "Nn" designates one of the
eight address offset registers, N0–N7; and the notation "Mn" designates one of the eight
MOTOROLA
INSTRUCTION FORMATS
23
NOT USED
23
NOT USED
23
SIGN EXTENSION
OF A2
23
NOT USED
23
16 15
ZERO FILL
INSTRUCTION SET INTRODUCTION
8 7
0
BUS
LSB OF
WORD
8 7
0
A2
REGISTER A2, B2
8 7
0
CONTENTS
BUS
OF A2
0
BUS
LSB OF
WORD
15
0
ADDRESS ALU
REGISTERS
0
BUS
6 - 7

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