Section 6.4 Instruction Groups; Arithmetic Instructions; Special Addressing – I/O Short Address - Motorola DSP56000 Manual

24-bit digital signal processor
Hide thumbs Also See for DSP56000:
Table of Contents

Advertisement

EXAMPLE: MOVEP A1, X:<<$FFFE
BEFORE EXECUTION
A2
A1
55
48 47
X
X
1 2 3 4 5 6
7
0 23
$FFFF
$FFFE
$FFC0
*Contents of Bus Control Register (X:$FFFE) After Reset
Assembler Syntax: pp
Operands Referenced: X:, Y Memories
Additional Instruction Execution Time (Clocks): 0
Additional Effective Address Words: 0
Figure 6-12 Special Addressing – I/O Short Address
ALU, execute in one instruction cycle. These instructions may affect all of the CCR bits.
Arithmetic instructions are register based (register direct addressing modes used for oper-
ands) so that the data ALU operation indicated by the instruction does not use the XDB,
the YDB, or the global data bus (GDB). Optional data transfers may be specified with most
arithmetic instructions, which allows for parallel data movement over the XDB and YDB
or over the GDB during a data ALU operation. This parallel movement allows new data to
be prefetched for use in subsequent instructions and allows results calculated in previous
instructions to be stored. The following list contains the arithmetic instructions:
MOTOROLA
INSTRUCTION GROUPS
A0
24 23
0
X X X X X X
0 23
0
X MEMORY
23
0
0 0 F F F F*
INSTRUCTION SET INTRODUCTION
AFTER EXECUTION
A2
A1
55
48 47
X
X
1 2 3 4 5 6
7
0 23
$FFFF
$FFFE
I/O SHORT
ABSOLUTE
ADDRESS
SPACE
$FFC0
A0
24 23
0
X X X X X X
0 23
0
X MEMORY
23
0
0 0 3 4 5 6
6 - 21

Advertisement

Table of Contents
loading

This manual is also suitable for:

Dsp56k

Table of Contents