Configuration - Fujitsu 8FX Hardware Manual

CHAPTER 20 16-BIT RELOAD TIMER

20.2 Configuration

20.2 Configuration
The 16-bit reload timer consists of the following blocks:
• Count clock generation circuit
• Reload control circuit
• Output control circuit
• Operation control circuit
• 16-bit reload timer timer register ch. n (TMRHn, TMRLn)
• 16-bit reload timer reload register ch. n (TMRLRHn, TMRLRLn)
• 16-bit reload timer control status register ch. n (TMCSRHn, TMCSRLn)
The number of pins and that of channels of the 16-bit reload timer vary among products. For
details, refer to the device data sheet.
In this chapter, "n" in a pin name and a register abbreviation represents the channel number.
For details of pin names, register names and register abbreviations of a product, refer to the
device data sheet.
■ Block Diagram of 16-bit Reload Timer
Figure 20.2-1 shows the block diagram of the 16-bit reload timer.
Count clock generation circuit
Pin
TIn
Internal clock
16-bit reload timer control
status register (upper) ch. n (TMCSRHn)
356
Figure 20.2-1 Block Diagram of 16-bit Reload Timer
16-bit reload timer reload register ch. n
(TMRLRHn, TMRLRLn)
16-bit reload timer timer register ch. n
(TMRHn, TMRLn)
CLK
Input
Valid clock
control circuit
judgment
circuit
Clock
CLK
selection
Select
Function
selection
CSL2 CSL1 CSL0 MOD2 MOD1 MOD0
FUJITSU SEMICONDUCTOR LIMITED
Internal bus
Reload
Reload
control circuit
Output control circuit
Output signal
generation
Inversion
circuit
Wait
OUTE OUTL RELD INTE UF CNTE TRG
Internal bus
MB95630H Series
Pin
TOn
Enable
Operation
control
circuit
16-bit reload timer control
status register (lower) ch. n (TMCSRLn)
Interrupt request
signal
MN702-00009-2v0-E