16-Bit Mpg Output Data Buffer Register (Upper) (Opdbrhx) - Fujitsu 8FX Hardware Manual

8-bit microcontroller new 8fx family
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CHAPTER 21 MULTI-PULSE GENERATOR
21.6 Registers
21.6.4.1
16-bit MPG Output Data Buffer Register (Upper)
(OPDBRHx)
The 16-bit MPG output data buffer register (upper) (OPDBRHx) selects the pair
of OPDBRHx/OPDBRLx register whose data is to be loaded to the OPDUR/
OPDLR register, and the waveform to be loaded to the OPT5 pin and OPT4 pin.
■ Register Configuration
bit
7
Field
BNKF
Attribute
R/W
Initial value
0
■ Register Functions
[bit7:4] BNKF, RDA[2:0]: OPDBRHx/OPDBRLx register select bits
These bits select data in which 16-bit MPG output data buffer register (upper/lower) (OPDBRHx/OPDBRLx)
is to be loaded to the OPDUR/OPDLR register. Data in the 16-bit MPG output data buffer register (upper/
lower) (OPDBRHx/OPDBRLx) selected is to be loaded to the OPDUR/OPDLR register.
bit7:4
Writing "0000"
Writing "0001"
Writing "0010"
Writing "0011"
Writing "0100"
Writing "0101"
Writing "0110"
Writing "0111"
Writing "1000"
Writing "1001"
Writing "1010"
Writing "1011"
Writing a value
other those above
[bit3:2] OP5[1:0]: OPT5 output waveform select bits
These bits select the output waveform to the OPT5 pin.
The waveform selected is to be output to the OPT5 pin after the data in the OPDBRHx/OPDBRLx specified
in the BNKF bit and RDA[2:0] bits is loaded to the OPDUR/OPDLR register.
bit3:2
Writing "00"
Writing "01"
Writing "10"
Writing "11"
436
6
5
RDA2
RDA1
R/W
R/W
0
0
Selects data in OPDBRH0/OPDBRL0 as the next data to be loaded to OPDUR/OPDLR.
Selects data in OPDBRH1/OPDBRL1 as the next data to be loaded to OPDUR/OPDLR.
Selects data in OPDBRH2/OPDBRL2 as the next data to be loaded to OPDUR/OPDLR.
Selects data in OPDBRH3/OPDBRL3 as the next data to be loaded to OPDUR/OPDLR.
Selects data in OPDBRH4/OPDBRL4 as the next data to be loaded to OPDUR/OPDLR.
Selects data in OPDBRH5/OPDBRL5 as the next data to be loaded to OPDUR/OPDLR.
Selects data in OPDBRH6/OPDBRL6 as the next data to be loaded to OPDUR/OPDLR.
Selects data in OPDBRH7/OPDBRL7 as the next data to be loaded to OPDUR/OPDLR.
Selects data in OPDBRH8/OPDBRL8 as the next data to be loaded to OPDUR/OPDLR.
Selects data in OPDBRH9/OPDBRL9 as the next data to be loaded to OPDUR/OPDLR.
Selects data in OPDBRHA/OPDBRLA as the next data to be loaded to OPDUR/OPDLR.
Selects data in OPDBRHB/OPDBRLB as the next data to be loaded to OPDUR/OPDLR.
Setting prohibited
Selects "L" level as the waveform to be output to the OPT5 pin.
Selects the output of the PPG timer as the waveform to be output to the OPT5 pin.
Selects the inverted output as the waveform to be output to the OPT5 pin.
Selects "H" level as the waveform to be output to the OPT5 pin.
FUJITSU SEMICONDUCTOR LIMITED
4
3
RDA0
OP51
R/W
R/W
0
0
Details
Details
MB95630H Series
2
1
OP50
OP41
R/W
R/W
0
0
MN702-00009-2v0-E
0
OP40
R/W
0

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