Interrupts - Fujitsu 8FX Hardware Manual

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CHAPTER 24 I C BUS INTERFACE

24.5 Interrupts

24.5 Interrupts
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The I C bus interface has a transfer interrupt and a stop interrupt which are
triggered by the following events.
• Transfer interrupt
A transfer interrupt occurs either upon completion of data transfer or when a
bus error occurs.
• Stop interrupt
A stop interrupt occurs upon detection of a stop condition or arbitration lost
or upon access to the I
■ Transfer Interrupt
Table 24.5-1 shows the transfer interrupt control bits and I
Table 24.5-1 Transfer Interrupt Control Bits and I
Interrupt request flag bit
Interrupt request enable bit
Interrupt source
• Interrupt upon completion of transfer
An interrupt request is output to the CPU upon completion of data transfer if the transfer
completion interrupt request enable bit has been set to enable (IBCR1n:INTE = 1). In the
interrupt service routine, write "0" to the transfer completion interrupt request flag bit
(IBCR1n:INT) to clear the interrupt request. When data transfer is completed, the
IBCR1n:INT bit is set to "1" regardless of the value of the IBCR1n:INTE bit.
• Interrupt in response to a bus error
When the following conditions are met, a bus error is deemed to have occurred, and the I
bus interface will be stopped.
- When a stop condition is detected in master mode.
- When a start or stop condition is detected during transmission or reception of the first
byte.
- When a start or stop condition is detected during transmission or reception of data
(excluding the start, first data, and stop bits).
In these cases, an interrupt request is output to the CPU if the bus error interrupt request enable
bit has been set to enable (IBCR1n:BEIE = 1). In the interrupt service routine, write "0" to the
bus error interrupt request flag bit (IBCR1n:BER) to clear the interrupt request. When a bus
error occurs, the IBCR1n:BER bit is set to "1" regardless of the value of the IBCR1n:BEIE bit.
500
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C bus interface in stop/watch mode.
Sources
Item End of transfer
IBCR1n:INT =1
IBCR1n:INTE =1
Data transfer complete
FUJITSU SEMICONDUCTOR LIMITED
MB95630H Series
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C bus interface interrupt sources.
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C Bus Interface Interrupt
Bus error
IBCR1n:BER =1
IBCR1n:BEIE =1
Bus error occurred
MN702-00009-2v0-E
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C